YOUR IMAGE SENSOR PARTNER

info@imasenic.com

+34-935466100

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Image sensing architectures

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Readout architectures

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Sensor management blocks

At IMASENIC we know that many imaging applications requires custom designs. Thanks to our rich IP portfolio, we can develop the circuit for your needs while being cost-effective.

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We have developed a wide range of different pixel architectures, starting from the simple, but still very useful 3-transistors (3T) pixel, to some of the most complex pixels in the imaging arena, with over 600 transistors per pixel. Pixel architectures we have developed are:

• 3T pixel, including radiation hardened design (>40 Mrad)

• 4T pixel

• High Dynamic Range pixel (>120 dB, or 20 bits)

• Single Photon Avalanche Detectors, photon counting of visible light photons, with low dark count rate and in-pixel Time-to-Digital Converter (TDC)

• Event-driven pixel, with time stamping at 12.5 ns resolution

• Charge-coupled device (CCD) in CMOS

• Ultra-high speed pixels, recording burst of images at 20 Mfps

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Depending on the specifications, including system requirements, we will select the most appropriate readout architectures. Analog readout is still appropriate in some applications, while on-chip analog-to-digital conversion is more often used. We know how to optimise the whole readout chain, from the pixel to the output.

• in-pixel electronics, optimised for noise, speed, dynamic range

• column amplifier, with variable gain

• column-parallel analog-to-digital converters (ADC) and beyond, including more than one ADC per column

• high speed serialisers and output

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In order to simplify the integration of the sensor in a system, other blocks will be integrated on chip, including, but not exclusively:

• focal plane drivers

• timing control blocks

• power management blocks, like low dropout regulators (LDO) and charge pumps

• temperature sensors